1. Field of the Invention
This invention relates to semiconductor manufacturing, and more particularly to mapping the edge and other characteristics of semiconductor wafers and other workpieces.
2. Background of the Related Art
Semiconductor wafers are handled in many types of test and manufacturing equipment. Characteristics of a wafer thus often need to be known to test the wafer. One characteristic is the orientation of a wafer, which is used to provide a standard reference against which the location and characteristics of test points may be measured. To provide an orientation and other information, wafers are manufactured with index marks such as flats or notches provided in the edge of the wafer. A testing apparatus or semiconductor manufacturing equipment can position the wafer at a chosen orientation or test a specific section of the wafer by referencing the index mark. In addition, there is often a need to know the location of the center of a wafer. For example, robot arms that handle wafers should be able to detect the center of a wafer so that the arm can reliably position the wafer on a testing platform. It is therefore desirable to have a mechanism for finding both the index mark and the center of a wafer for both testing and manufacturing purposes.
One way to find wafer index marks and centers is to map the edge of a wafer. This can be accomplished using a variety of methods. In one method, a wafer is positioned on a rotatable platform having a smaller diameter than the wafer, where the edge of the wafer is positioned within or over a sensor. The platform is rotated, and the position of the edge of the wafer is detected by the sensor throughout the entire 360-degree rotation. From this edge information, notches or flats in the wafer's edge can be found, and the center of the wafer can be calculated. Once the edge is mapped, a robot arm typically picks up the wafer and places the wafer on a different testing platform, such as a test chuck, in the desired orientation. Testing and processing apparatus can then perform tests and processing at specific points on the wafer.
Problems with this prior art method include the fact that the wafer must be transported from the edge mapping platform to a different test chuck for testing or processing. This introduces some possible error to the center location and orientation data of the wafer: the center point of the wafer on the chuck may not be precisely known due to positional shifts of the wafer when it was transported. Thus, the location of points on the wafer which are tested on the chuck may not be known accurately. In addition, testing and processing times for a semiconductor wafer are increased due to the prior art process of transporting the wafer from an edge mapping appratus to a testing/processing apparatus.
The prior art edge mapping apparatus also include limitations for the dimensions of the rotatable platform depending on the size of the wafer being tested. The wafer must be larger than the platform so that the wafer's edge is positioned within or near the sensor. This provides constraints on the size of the platform, and can be a problem if testing differently-sized wafers on the same platform. For example, an 8-inch wafer might be larger than a testing platform and thus could have its edge mapped, but a 6-inch wafer might not be large enough to use the same platform apparatus.
Another characteristic of a wafer which often needs to be known to test the wafer is the height of the wafer at various points on the wafer's surface, i.e. a height mapping of the wafer. Since a wafer is subject to various stresses during testing or transport, the surface of the wafer can often become warped. Testing equipment such as contact probes must be precisely positioned to contact a wafer's surface without damaging the wafer. If a wafer has a warped surface, the height of the wafer can vary over the surface of the wafer. A mapping of the wafer's height is thus useful in determining at what height above a wafer a probe or other test apparatus should be positioned.
Another problem with the prior art apparatus for mapping the edge of a wafer is that their mapping functions are quite specific to wafer edge mapping. If other characteristics of the wafer need to be mapped, such as height or reflectivity, a different testing apparatus must be used. This can lead to inefficiency in testing time when transporting the wafers and inefficiency in manufacturing cost of producing several different testing apparatus.
What is needed is an apparatus and method that will quickly, accurately and economically map the edge of a wafer on a testing chuck or other surface so that the wafer does not have to be transported to a separate testing or processing surface. What is also needed is such an edge mapping apparatus and method that also maps a variety of additional characteristics of the tested wafer or other workpiece.